Rosa M. Badia is the Manager of Workflows and Distributed Computing at the Barcelona Supercomputing Center (BSC). Her current research is focused on programming models for multicore architectures and distributed environments. She has authored/co-authored more than 150 publications in international conferences and journals.
Badia’s honors include receiving the Euro-Par Achievement Award for her contributions to parallel processing, and the HPDC Achievement Award for her innovations in parallel task-based programming models, workflow applications and systems, and leadership in the high performance computing research community.
She has also been involved in several international research projects at the European level, including Adapting Service lifeCycle towards EfficienT Clouds (ASCETiC), EUrope-BRAzil Collaboration on BIG Data Scientific REsearch through Cloud-Centric Applications (EUBra-BIGSEA) and the Human Brain Project, among others. Badia is currently the principal investigator of the Enabling dynamic and Intelligent workflows in the future EuroHPC ecosystem (eFlows4HPC) project. She was recently elected as Vice Chair of the ACM Europe Council.
How did you initially become interested in parallel computing?
I did my PhD in design automation for asynchronous circuits. However, once I graduated, I had the opportunity to join a project organized by the European Center for Parallelism of Barcelona (CEPBA) dealing with the parallelization of applications, performance prediction and distributed computing. These topics were very attractive to me, and I could not stop doing research around them. A few years later, CEPBA was the group that initiated the Barcelona Supercomputing Center, and I have been involved since its beginning. There, I participate in very challenging projects around parallel computing and supercomputing.
One of your most downloaded papers from the ACM Digital Library is “Multitasking on reconfigurable architectures: microarchitecture support and dynamic scheduling.” What was a key insight of this paper?
This is one of the more cited papers of my first PhD student Juanjo Noguera. He proposed very innovative contributions to the hardware/software co-design of reconfigurable computing. Reconfigurable computing combines the flexibility of software with the high performance of hardware by means of reprogrammable hardware such as field-programmable gate arrays (FPGAs). In this work, we proposed an approach based on microarchitecture support for dynamic scheduling. The proposed microarchitecture used a hardware-based configuration prefetching unit. It was the first time that such hardware-based dynamic scheduling for reconfigurable architectures was proposed. Results obtained in that research demonstrated the benefits of our approach (achieving similar performance to a static configuration solution but using half of the resources).
At the recent International Symposium on High Performance Parallel and Distributed Computing (HPDC ’21), you presented a keynote address titled “Superscalar Programming Models: A Perspective from Barcelona.” What are superscalar programming models and why are they important to the current state of high performance computing research?
We use the term superscalar programming as an analogy to superscalar processors. Superscalar processors implement a form of parallelism called instruction-level parallelism within a single processor. Similarly, superscalar programming enables programmers to write high-level sequential code that is parallelized at task level. We have been proposing instances of superscalar programming models for around 20 years now, targeting both parallelism at node level, accelerators and distributed computing. Such programming models simplify the development of parallel applications while leveraging the performance of high performance computing infrastructures. In addition, the exploitation of the parallelism at task level avoids the use of global synchronizations, which are source of load imbalance and low resource usage. Current efforts of my group focus on proposals based on superscalar programming to enable large workflows of integrated HPC simulation and modeling, artificial intelligence and big data. These efforts are performed in multiple projects, but in particular in the eFlows4HPC project, where I am the principal investigator.
What makes the Barcelona Supercomputing Center unique among other supercomputing centers in the world?
The BSC aims at providing supercomputing services to the international scientific community and industry. However, in addition to the operations department, which provides these services, BSC integrates four research departments: Computer Sciences, Life Sciences, Earth Sciences and Computer Applications in Science and Engineering. Our research lines are developed within the framework of European Union research funding programs, Spanish and Catalan public research calls and collaborations with leading companies. The collaboration between the different operations and research departments enables us to obtain synergies and alliances that produce multidisciplinary results. Another unique aspect of the BSC is the fact that our supercomputer MareNostrum is located in a chapel. The combination of the chapel architecture with the technology of the supercomputer has been considered the most beautiful datacenter in the world.
As the newly-elected Vice Chair, how would you like to see the ACM Europe Council grow in the coming years?
ACM is not as present in Europe as it is on other regions. In this sense, I would like to contribute to the ACM Europe Council by helping to expand the presence of European professionals within ACM and especially by helping to promote European candidates in ACM bodies and grades. I would also like to contribute to increasing the visibility of women in Computer Science and IT technology, where we are underrepresented. In addition, I would like to support the organization of relevant ACM conferences in Europe.